With continuous development of power electronics technology, a pulse width modulation (PWM) has been a mainstream control manner of a power electronics inverter, and is increasingly widely applied to an uninterrupted power supply (UPS), a photovoltaic inverter, a wind energy current transformer, a motor current transformer and the like.
A PWM inverter can be classified into a two-level inverter, a three-level inverter, a five-level inverter and a multi-level inverter based on the number of levels of a phase voltage outputted from the PWM inverter. In terms of implementation complexity, the five-level inverter and the multi-level inverter having more than five levels are difficult to be implemented, and the two-level inverter and the three-level inverter are mostly used in the industry currently.
The two-level inverter is easy to be implemented, and has a low cost, however, since a switch device suffers from voltage stress of a whole bus, a switch device having a high withstand voltage level is selected. The two-level inverter and the three-level inverter have a great switch loss, which limits a switch frequency of the PWM. In addition, voltages outputted by the two-level inverter and the three-level inverter have high harmonic components, which results in great volume and loss of an output filter.
FIG. 1A is a schematic structural diagram of an existing multi-level inverter, which includes a first bus capacitor C1, a second bus capacitor C2, a third bus capacitor C3, a fourth bus capacitor C4, a seventh switch unit 17, an eighth switch unit 18, an inverter circuit and a filtering circuit 10. The inverter circuit includes a first switch unit 11, a second switch unit 12, a third switch unit 13, a fourth switch unit 14, a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4. A series point between the second switch unit 12 and the third switch unit 13 is connected to the filtering circuit 10. The third diode D3 and the fourth diode D4 in FIG. 1A have high on-state voltage drop, which results in high conduction loss in a circuit structure of the inverter, and that five-level operation in four quadrants cannot be realized in an inverter topology, and a high switch loss and great power consumption of the circuit.